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Showing posts from November, 2022

CMOS inverter withod capacitor multisim output representation vlsi

advanced processor GSM full code with output/advanced processor 3rd year practical assignments

serial transmission of data in advanced processor code with output/3rd year entc

Automatic speech recognization using digital signal processing/DSP

ARM INTRODUCTION_ARM CONTROLLER/LPC2148

CMOS DESIGN/VLSI/ENTC/TY

verilog behavioural modelling/vlsi

verilog HDL dataflow/dataflow modelling/vlsi

gate level modelling in vlsi/core/vlsi

verilog design flow vlsi pt 3/ENTC/CORE/VLSI

verification of superposition principal /ENTC /2ND YEAR/LAB PRACTICAL

verilog design flow/verilog in vlsi/brief description